Hsinyu (Sidney) Tsai

Department

Analog AI and Design Automation group at Almaden Research Lab

Job Title

Manager, Principal Research Staff Member

INSTRUCTION LANGUAGES

Mandarin, English

PERSONAL BIO

HsinYu (Sidney) Tsai received her Ph.D. from the Electrical Engineering and Computer Science department at Massachusetts Institute of Technology in 2011. After graduation, Sidney joined the Nanofabrication and Electron Beam Lithography group at the IBM T.J. Watson Research Center as Research Staff Member and developed directed self-assembly (DSA) lithography for fabricating finFETs. From 2015-2016, Sidney managed the Advanced Lithography group in the Microelectronics Research Laboratory (MRL), managing operations of a 200mm research prototyping line.

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Sidney currently works in the Alamden Research Center in San Jose, CA, as a Principal Research Staff Member and manager of the Analog AI group. Analog AI based on Phase Change Memory (PCM) devices utilizes emerging non-volatile memory embedded in the backend to compute vector-matrix multiplication at the location of data, achieving high power performance for Deep Learning workloads in the Cloud and on the edge. The group demonstrates software compatible accuracies for both training and inference of Deep Neural Networks (DNNs), highlighted in two Nature publications in 2018 and 2023. The group is now focusing on developing large scale, configurable hardware for inference and AI for design automation.

WORK EXPERIENCE AND AWARDS

Manager, Analog AI group at IBM Almaden Research Lab, USA (2020-present)
Team member, AI Hardware Accelerator groups at IBM Almaden Research Lab, USA (2016-2020)
Manager, Advanced Lithography Group at IBM Thomas J Watson Lab, USA (2015-2016)
Team member, E-beam Lithography Group at IBM Thomas J Watson Lab, USA (2011-2015)

EDUCATIONAL BACKGROUND

PhD in Electrical Engineering & Computer Science Department, Massachusetts Institute of Technology, USA
Master in Electrical Engineering & Computer Science Department, Massachusetts Institute of Technology, USA
Bachelor in Electrical Engineering and Physics, National Taiwan University, Taiwan

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VacancIES

Brief Introduction of the Department

The IBM Analog AI team is global team focusing on advancing the forefront of in-memory computing technologies to overcome the Von-Neumann Bottleneck. By performing vector-matrix multiplication (VMM) at the location where data is stored, we save time and energy by reducing data communication between memory and the compute unit. This efficient VMM computation is particularly powerful in deep neural network (DNN) applications, where the VMMs can tolerate a certain level of errors, for example, due to reduced-precision or noisy computations, without effecting accuracy of the DNN model. The team demonstrated near software-equivalent DNN accuracies both in phase change memory (PCM) hardware and in software simulations. We published high profile papers with >7000 citations since 2015 and authored numerous patents every year.

The Analog AI global team includes members from Almaden/California, Yorktown/New York, Albany/New York, Tokyo, and Zurich. The Almaden Research team holds technical leadership roles in a broad range of topics, including PCM hardware testing, circuit design, algorithm simulations, application exploration, architecture definition, and software development. The team has hosted many intern students and visiting scholars in the past from around the world, including US, Europe, Brazil, Japan, and Taiwan. Some students are now regular employees at IBM and many continued to advance their careers in related fields.

Department Staff Number

5-10 people

Internship Job Description

As part of the IBM Research Semiconductor team, you will conduct world-class research on AI Hardware using in-memory computing for Deep Neural Network acceleration. The IBM Almaden Analog AI team published an in-memory computing (IMC) chip with phase change memory (PCM) integrated in the metal stack on top of 14nm CMOS circuitry for Deep Learning acceleration. (reference: https://www.nature.com/articles/s41586-023-06337-5) This chip, containing 1 million PCM devices per tile and 34 tiles per chip, is an important stepping stone towards a scalable and configurable architecture. (reference: https://ieeexplore.ieee.org/abstract/document/9957094)

In this internship, the student will develop software stack and/or hardware components for an in-memory computing architecture. Research could include Deep Neural Network accuracy simulations, hardware demonstrations, and power performance modeling. The student will gain hands-on experience implementing DNN workloads, such as CNN and Transformers, for deployment onto the IMC chip and in simulation using the AIHWKIT. (reference: https://github.com/IBM/aihwkit)

Preferred Intern Education Level

Undergraduate students (third year and above)
Master students
Doctoral students

Preferred Intern Skill Sets or Qualities

Familiar with Python, PyTorch, C++
Knowledge on Transformers or in-memory computing architecture or Analog circuit design is a plus

Internship Period

From June 16 to September 5, 2025 (adjustable at the discretion of the organisation)

Others

Expected working hours per week: 40 hours
This internship position will be in San José.
Salaries (stipends) will not be provided.
Benefits will not be provided.
The VISA fee will be covered by IBM Research.
※ Taiwanese admittees will have opportunities to be subsidized by 「教育部學海築夢」 scholarship.

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Brief Introduction of the Department

The department of AI for EDA is responsible for development and integration of AI and ML algorithms with applications in Electronic Design Automation. Hardware design is suffering from a talent gap, where the number of new hardware engineers cannot keep up with the ever-increasing demand for faster and more powerful chips. As a result, hardware engineers are under pressure to design more complex and more powerful hardware in shorter periods of time. The hardware design field is ripe for AI disruption to assist hardware engineers with improved productivity and faster design cycles. AI for EDA department at IBM Research responsibilities cover the entire spectrum of design and takes advantage of technologies such as Deep Learning, Graph Neural Networks, Transformers, Large Language Models and Reinforcement Learning. Current projects include application of Large Language Models for coding and assisting chatbots,distributed optimization for digital design flow and analog/mixed signal circuit parameters, graph neural networks for prediction of design behavior and reinforcement learning for macro-placement. These technologies can assist hardware designers in many steps of their design workflow to improve their productivity.

The members of the AI for EDA team are located at IBM Almaden Research Center.They have experience and expertise in a broad range of topics including Computer Vision, Natural Language Processing, Distributed Machine Learning and Generative AI, in addition to Electronic Design Automation.

Department Staff Number

5-10 people

Internship Job Description

In this internship, the student will work alongside hardware designers to develop AI-based solutions with applications in the field of Electronic Design Automation (EDA). The research includes using different AI technologies such as GNNs, Reinforcement learning and transformers.

Preferred Intern Education Level

Undergraduate students (third year and above)
Master students
Doctoral students

Preferred Intern Skill Sets or Qualities

Expertise in machine learning techniques such as graph neural networks, transformers and/or reinforcement learning.
Experience with machine learning toolkits such as Pytorch.
Knowledge of hardware design flow and experience with Electronic Design Automation (EDA) tools is preferred.

Internship Period

From June 16 to September 5, 2025 (adjustable at the discretion of the organisation)

Others

Expected working hours per week: 40 hours
This internship position will be in San José.
Salaries (stipends) will not be provided.
Benefits will not be provided.
The VISA fee will be covered by IBM Research.
※ Taiwanese admittees will have opportunities to be subsidized by 「教育部學海築夢」 scholarship.

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